1. Field of the Invention
The present invention relates to a converter for converting a variable frequency multiple phase AC voltage source into DC. More specifically, the present invention relates to converters of the aforementioned type in which the multiple phase AC voltage contains substantial noise.
2. Description of the Prior Art
FIG. 1 illustrates a prior art converter 10 for converting a multiple phase variable frequency voltage, which may vary in magnitude, produced by a variable frequency multiple phase voltage source 12 producing a three phase output with each phase containing substantial noise (components above the fundamental frequency) into a variable DC output potential on output 14. FIG. 3A illustrates an example of the noisy AC produced by the variable frequency multiple phase voltage source 12. The system is designed for use in systems such as airframes. In this type of system, it is common that harmonics are produced by a multiple phase full wave rectification bridge 16 having six silicon controlled rectifiers 18 which are synchronously switched as is known in the art at the appropriate time during the individual voltage phases V.sub.A, V.sub.B, and V.sub.C to generate the DC output potential. During operation, each of the silicon controlled rectifiers is switched on for 120.degree. of the cycle of its associated voltage phase with the phase of the switching times controlling variation in amplitude. The presence of imprecise or false zero crossing points 63 as illustrated in FIG. 3A deleteriously affects the generation of properly timed timing signals for controlling the conduction of the SCR's 18.
The control of the signals controlling the on times of the individual silicon controlled rectifiers 18 is produced as follows. A phase reference voltage 20 is derived from the multiple phase voltage source 12 which is processed to generate the individual switching signals .circle.1 , .circle.2 , .circle.3 , .circle.4 , .circle.5 and .circle.6 to control the on intervals of the silicon controlled rectifiers 18. As stated above, the reference signal 20 is characterized by having a substantial noise component as illustrated in FIG. 3A including imprecise or false zero crossing points 63. The substantial noise component is produced by a combination of one or more operational factors including harmonics produced by the switching of the individual silicon- controlled rectif.ers 18 to produce the output DC potential which influences the current drawn from the multiple phase voltage source 12, operation in environments such as airframes where the output power being drawn from the multiple phase voltage source 12 is close to the rated maximum output power capacity and the relatively large commutation reactance of the multiple phase voltage source 12. The combination of one or more of the above three signal distorting factors produces individual sinusoidal output phases V.sub.A, V.sub.B, and V.sub.C having substantial noise. It should be understood that the phase reference signal 20 may be produced by a step down transformer coupled to an individual phase if a neutral is present in the multiple phase voltage source or, alternatively, by a step down transformer coupled across two of the phases if no neutral is present as illustrated in FIG. 1. The presence of substantial noise in the phase reference signal 20 produces substantial problems in generating the correctly phased switching signals for the silicon controlled rectifiers 18 as a consequence of the phase reference signal 20 not having well defined zero crossing points 63 which can cause misfiring of the silicon controlled rectifiers 18 and instability in closed loop control as a result of zero crossing points not being uniquely defined and detectable.
The reference signal 20 is applied to a square wave generator 22 which produces a square wave having changes in level synchronized with the zero crossing points of the reference signal 20. As described above, the presence of imprecise or false zero crossing points in the reference signal 20 causes the square wave generator 22 to produce an output signal having time base instabilities which deleteriously affect operation.
The output of the square wave generator 22 is applied to frequency-to-voltage converter 24 which produces an output DC voltage directly proportional to the input frequency. It should be understood that the multiple phase voltage source 12 is a variable frequency source which causes the output of the square wave generator 22 to vary in time base proportional to the frequency changes of the phase reference signal. The output DC signal from the voltage-to-frequency converter 24 is applied to a ramp generator 26 which produces a sawtooth waveform having a slope proportional to the DC output produced by the frequency-to-voltage converter 24 and a time base synchronized to the zero crossing points of the output signal from the square wave generator 22 by one-shot multivibrator 28.
A variable level DC output potential is produced on the output 14 by the following operation. A voltage demand signal 30 is produced by a conventional voltage level setting control such as a rheostat. The output potential from the output 14 is fed back to a conditioning circuit 32 which produces an output potential proportional to the DC output potential on the output 14. The output signal from the conditioning circuit 32 and the voltage demand signal 30 are summed by summer 34. The output signal from the summer 34 is applied to error amplifier 36 which produces an output signal proportional to the output from the summer 34. A control angle limiter 38 limits the error signal from the error amplifier 36 to produce a DC signal proportional to the difference between the output from the conditioning circuit 32 and the voltage demand signal 30 over the desired range of operation. Comparator 40 produces a rectangular wave output signal which functions as a timing signal for driving a synthesized six phase logic circuit including phase lock loop 42. The duty cycle of the comparator 40 is directly proportional to the time interval during which the sawtooth signal outputted by the ramp generator 26 is above the DC level applied to the comparator by the control angle limiter 38. The timing signal produced by the comparator 40 causes the synthesized six phase logic circuit including phase lock loop 42 to produce a series of output pulses 44 which are each separated by 60.degree. from each other as generally illustrated by the pulses on the top two outputs and further which may contain a duty cycle of 60.degree.. The synthesized six phase logic circuit including phase lock loop 42 contains an oscillator producing a basic frequency which is locked by the phase lock loop to be six times higher than the variable input frequency from the comparator 40. The signal produced by the oscillator is applied to a one-shot multivibrator 46 which produces a series of output pulses which are applied to logic circuit 48. The logic circuit 48 responds to the output pulses from the one-shot multivibrator 46 and synthesized six phase circuit including phase lock loop 42 to produce output signals which are applied to gate drivers 50 which activate the individual SCRs 18. A number appearing to the right of each of the gate drivers 50, which is circled, correlates the gate driver with its associated silicon controlled rectifier 18 which is activated by a high level output signal from the gate driver. In order to produce an output potential from 14, it is necessary that at any point in time at which current is to be outputted that one of the SCRs labelled .circle.1 , .circle.3 , .circle.5 and another of the SCRs labelled .circle.4 , .circle.6 and .circle.2 are simultaneously activated to permit current flow between two of the phases of the three phases of the multiple phase voltage source 12. The switching sequence of the SCRs 18 broken down into six 60.degree. intervals over a full cycle of the voltage outputted by the multiple phase voltage source 12 is with the following sequence of SCRs switched to an on state: 1 and 2, 2 and 3, 3 and 4, 4 and 5, 5 and 6, and 6 and 1. In summary, the prior art of FIG. 1 is adversely affected by the inherent noisy signal produced by the multiple phase voltage source 12 to generate switching signals for the SCR's 18 which do not have the requisite stability.
U.S. Pat. No. 4,347,562 discloses a trigger circuit system for a static converter controlling the firing angles for controlled rectifiers for converting a multiphase constant frequency AC power source into DC.